David Berner
Email: mail @ davidberner.de

Mailing Address:

50 route de Malagnou
1208 Genève
Switzerland

Phone: +41 76 374 8987

Web: http://www.davidberner.de

Short Bio David Berner received his Ph.D from the University of Rennes 1, France in 2006, the Diploma degree in Communication engineering and the M.Sc. in Communication and Media Engineering from the University of Applied Sciences Offenburg, Germany in 2001 and 2002. He is currently working at a swiss private bank in the production and integration of critical server applications. Previously he was a technical project manager in software quality assurance for a security software company, an assistant professor (ATER) at the École Nationale Supérieure d'Ingénieurs de Bourges and before that he was with the French National Institute for Research in Computer Science and Control (INRIA).

He has been a visiting researcher at the Center for Embedded Computer Systems in the University of California Irvine in 2000-2001 and at the Virginia Polytechnic Institute and State University (USA) in 2003, 2004, and 2005. His research interests include codesign of embedded systems, electronic system level design, formal methods, and security aspects. Publications
Chapters in Books

  1. David Berner, Syed Suhaib, Sandeep Kumar Shukla, Jean-Pierre Talpin,
    "Capturing Formal Specification into Abstract Models" ,
    Bookchapter in Formal Methods and Models for System Design. © Kluwer Academic Publishers, June 2004.
    [buy at Amazon]

  2. Jean-Pierre Talpin, David Berner, Sandeep Kumar Shukla, Abdoulaye Gamatié, Paul Le Guernic, Rajesh Gupta,
    "Behavioral Type Inference for Compositional System Design",
    Bookchapter in Formal Methods and Models for System Design. © Kluwer Academic Publishers, June 2004.
    [buy at Amazon]


International Journals
  1. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla,
    "Validating Families of Latency Insensitive Protocols",
    IEEE Transactions on Computers (TCOMP), Special Issue on Simulation-Based Validation. Volume 55, No. 11, pp. 1391-1401, November 2006.
    [ link | PDF ]

  2. Hiren D. Patel, Deepak A. Mathaikutty, David Berner and Sandeep K. Shukla,
    "CARH: service-oriented architecture for validating system-level designs",
    IEEE Transactions on CAD (TCAD). Volume 25, Issue 8, pp. 1458-1474, August 2006
    [ link | PDF ]

  3. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla,
    "XFM :An Incremental Methodology for Developing Formal Models",
    ACM Transactions on Design Automation of Electronic Systems (TODAES) Special Issue on Validation of Large Systems. Volume 10, Issue 4, pp. 589-609, October 2005.
    [ link | PDF ]

Peer Reviewed International Conferences and Workshops
  1. Hamoudi Kalla, Jean-Pierre Talpin, David Berner, Loic Besnard,
    "Automated Translation of C/C++ Models into a Synchronous Formalism",
    IEEE International Conference and Workshop on the Engineering of Computer Based Systems (ECBS). Potsdam, Germany, March 2006
    [ link | PDF ]

  2. David Berner, Hiren Patel, Deepak Mathaikutty, Sandeep Shukla,
    "Automated Extraction of Structural Information from SystemC-based IP for Validation",
    Proceedings of the 6th International Workshop on Microprocessor Test and Verification (MTV'05). Austin, Texas, USA, November 2005.
    [PDF]

  3. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla,
    "Validating Families of Latency Insensitive Protocols",
    IEEE International High Level Design Validation and Test Workshop (HLDVT). Napa Valley, California, USA, November 2005
    [ PDF ]

  4. David Berner, Hiren Patel, Deepak Mathaikutty, Jean-Pierre Talpin, Sandeep Shukla,
    "SystemCXML: An Extensible SystemC Front End Using XML",
    Proceedings of the Forum on specification and design languages (FDL). Lausanne, Switzerland, September 2005.
    [ PDF ]

  5. Syed Suhaib, David Berner, Deepak Mathaikutty, Jean-Pierre Talpin, Sandeep Shukla,
    "A Functional Programming Framework for Latency Insensitive Protocol Validation",
    Proceedings of the International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS). Verona, Italy, July 2005.
    [ link | PDF ]

  6. David Berner, Jean-Pierre Talpin, Sandeep Kumar Shukla, Paul Le Guernic,
    "Modular Design Through Component Abstraction",
    Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), pages 202-211. Washington DC, USA, September 2004.
    [ link | PDF ]

  7. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla,
    "Extreme Formal Modeling (XFM) for Hardware Models",
    5th International Workshop on Microprocessor Test and Verification (MTV'04). Austin, Texas, USA, September 2004.
    [ link | PDF ]

  8. Jean-Pierre Talpin, David Berner, Sandeep Shukla, Abdoulaye Gamatié, Paul Le Guernic, Rajesh Gupta,
    "A Behavioral Type Inference System for Compositional System-On-Chip Design",
    International Conference on Application of Concurrency to System Design (ACSD). Hamilton, Canada, June 2004.
    [ link | PDF ]

  9. Jean-Pierre Talpin, Abdoulaye Gamatié, David Berner, Bruno Le Dez, Paul Le Guernic,
    "Hard real-time implementation of embedded systems in JAVA",
    International Workshop on Scientific Engineering of Distributed JAVA Applications (FIDJI). © Springer Verlag, November 2003.
    [ link | PDF ]

  10. David Berner and Werner Reich,
    "Animated Visualization of Convolution and Correlation",
    2nd UNESCO Global Congress on Engineering Education, Wismar, Germany, July 2000.
    [ PDF | software ]


Technical Reports
  1. David Berner, Hiren Patel, Deepak Mathaikutty, Sandeep Shukla, and Jean-Pierre Talpin,
    "SystemCXML: An Extensible SystemC Frontend Using XML",
    FERMAT Technical Report #2005-06. Virginia Tech, Blacksburg, VA, April 2005.
    [PDF]

  2. Syed Suhaib, Deepak Mathaikutty, David Berner and Sandeep Shukla,
    "Functional Programming Framework for Latency Insensitive Protocol Validation",
    FERMAT Technical Report #2005-03. Virginia Tech, Blacksburg, VA, April 2005.
    [PDF]

  3. Syed Suhaib, David Berner, Deepak Mathaikutty and Sandeep Shukla,
    "Presentation and Formal Verification of a Family of Protocols for Latency Insensitive Designs.",
    FERMAT Lab Technical Report #2005-02. Virginia Tech, Blacksburg, VA, January 2005.
    [PDF]

  4. Hiren Patel, David Berner, Deepak Mathaikutty and Sandeep Shukla,
    "Introspective-SystemC: Reflection and Introspection in SystemC",
    FERMAT Lab Technical Report #2004-22. Virginia Tech, Blacksburg, VA, December 2004.
    [PDF]

  5. Syed Suhaib, David Berner, Sandeep Shukla,
    "Extreme Formal Modeling to Capture Specification for a SmartBuilding Control System into a constructively correct model",
    FERMAT Lab Technical Report #2004-01. Virginia Tech, Blacksburg, VA, January 2004.
    [PDF]

  6. Syed Suhaib, David Berner, Sandeep Shukla,
    "Extreme Modeling in PROMELA: Formal Modeling and Verification of a Smart Building Control System",
    FERMAT Lab Technical Report #2003-11. Virginia Tech, Blacksburg, VA, December 2003.
    [PDF]

  7. David Berner, Syed Suhaib, Sandeep Shukla, Harry Foster,
    "XFM: Extreme Formal Method for Capturing Formal Specification into Abstract Models",
    FERMAT Lab Technical Report #2003-08. Virginia Tech, Blacksburg, VA, December 2003.
    [PDF]

  8. Talpin, J.-P., Le Dez, B., Gamatié, A., Le Guernic, P., Berner, D.,
    "Component-based engineering of real-time JAVA applications on a polychronous design platform",
    INRIA research report n. 4744, February 2003.
    [PDF]

  9. David Berner, Dirk Jansen, Daniel D. Gajski, 
    "Development of a Visual Refinement and Exploration tool for SpecC",
    Technical Report ICS-01-12, University of California, Irvine, March 2001.
    [PDF]


Other
  1. David Berner, 
    "Using Formal Methods for the CoDesign of Embedded Systems",
    PhD Thesis, University of Rennes 1, INRIA/IRISA, Rennes, France, March 2006.
    [ PDF ]

  2. David Berner,
    "Pipelining Control for a 32 bit Microprocessor",
    Master Thesis, University of Applied Sciences, Offenburg, Germany, August 2002.
    [PDF]

  3. David Berner,
    "Entwicklung einer Systemumgebung für SystemLevel Design in SpecC",
    Paper for the 26. Multiproject Chip Group Workshop (MPC), Pforzheim, Germany, July 2001. 
    [PDF]

  4. David Berner, 
    "Development of a Visual Refinement and Exploration tool for SpecC",
    Diplomarbeit, Fachhochschule Offenburg and University of California, Irvine, February 2001.
    [PDF]
     last modified on 2011-07-07